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NVM IP White Papers

Kilopass Brings Gusto to Memory

June 2010 | Read White Paper

Now designers have another option. Kilopass, already an established player in nonvolatile memory (NVM), has introduced an improved version of its antifuse OTP. Called Gusto, it’s licensed as process-portable intellectual property (IP). It is the industry’s first 4Mb OTP, quadrupling the capacity of existing OTP memories. It’s large enough to store boot code and system firmware, rather than just code patches, configuration code, and trim settings for analog components. In addition, Kilopass claims Gusto reads memory two to four times faster, cuts active power consumption by an order of magnitude, and slashes current leakage in standby mode by a factor of 40.


Integrating High Density Antifuse OTP NVM for Code Storage

July 2009 | Read White Paper | Download PDF

For code storage, the most common NVM technologies used today are ROM and external flash/EEPROM solutions; however, in the 90nm and below, antifuse one-time programmable (OTP) technology is starting to gain in popularity. Antifuse has unique advantages of using a standard CMOS process, being highly secure, field programmable, and having indefinite data retention. These traits drive down overall cost of the SOC product. As the process technology scales, it will favor antifuse since the OTP die area will scale, resulting in shorter programming time.


A Comparison of Embedded Non-Volatile Memory Technologies and Their Applications

May 2009 | Read White Paper | Download PDF

There are five embedded NVM technologies in the market: embedded Flash, ROM, eFuse, CMOS floating gate, and Antifuse. One benefit of the wide offering of technologies is that SOC designers and managers can choose the best solution for their end application. When choosing between the different technologies, an SOC designer or manager needs to consider the usage for the applications and the tradeoffs between each embedded NVM solution. Each has its advantages and disadvantages.


Eliminating Embedded Non-Volatile Memory IP Risks in SOCs

March 2009 | Read White Paper | Download PDF

With many embedded logic NVM options available, chip developers, foundry IP managers, and reliability managers need to narrow down the list of vendors by evaluating the risk of integrating an NVM IP. In this paper you will learn what to look for to ensure that the NVM IP will not cause headaches when your product goes into volume production.


Three Application Segments Require On-Chip OTP

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The use of high density one-time programmable (OTP) memory is now gaining considerable interest within the chip design community. The main reason for this renewed interest in OTP is the ability to tightly integrate high density permanent memory with digital logic in vanilla CMOS. The opportunity to tightly integrate OTP with SoC architectures sparks the system architect or designer’s imagination in three strong value-added application segments. They are: Security, SoC Configurability, and Manufacturability-Usability.


Profitable SoC Design: Using Logic NVM to Reduce SoC Costs

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Current trends in the semiconductor industry emphasize the inherent business and engineering risks associated with the development and production of a new chip. With very low incremental costs for implementing personalization design elements into system architectures,designers and technology leaders are now realizing tremendous value.


Methods for Configurable Hardware Design

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While adding post silicon production configurability has ample precedence with the introduction of FPGA devices in the late 1980’s, it is a more recent trend with SoC ASSP and ASIC architectures. As logic gates continue to get cheaper, the corresponding benefits of making devices configurable with the advantages of time-to-market, reduced project schedule risk, and inventory risk in post production are too important to ignore.


Secure, Low-cost On-Chip Code Storage for Embedded Signal-Processing Systems

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Consumer demand for appliances such as PDAs, digital cameras, cell phones, and MP3 players is forcing developers of such systems to continuously add new functionality to their products while offering them at lower price points. In addition, product vendors have become increasingly aware of and concerned about theft of product IP represented as code stored in silicon in these appliances. These market forces are changing the way such systems need to be designed.

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