On-chip code storage in SoCs gets another option
June 3, 2010
By Ron Wilson
Code storage in smaller embedded systems always presents some hard choices. You can put code in cheap, dense, metal-mask ROM on-chip in any modern CMOS process. But then a software bug fix or a new feature risks overflowing whatever patch-ROM provisions you have made and causing a mask spin. You can use on-chip Flash to get density plus reprogrammability, but then you are limited to more expensive and mature process choices, today 90nm and above. Hence often the cheapest solution is simply to put the code in an external serial Flash chip. But that creates board-space, reliability, and security questions. And since execution in place is impossible, you may end up having to enlarge your chip’s SRAM, running up the chip cost again, and incidentally increasing the energy consumption during code execution.