Kilopass Patents

 

  Title Patent No. / Serial No.
1 Semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric U.S. Patent No. 6,798,693
2 Semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric U.S. Patent No. 6,667,902
3 Semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric U.S. Patent No. 6,822,888
4 Semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric TW Patent No. 198223
5 Smart card having memory using a breakdown phenomenon in an ultra-thin dielectric U.S. Patent No. 6,766,960
6 Smart card having memory using a breakdown phenomenon in an ultra-thin dielectric

Taiwan Patent No. 234785
7 Smart card having memory using a breakdown phenomenon in an ultra-thin dielectric China Patent No. 011291508
8 Reprogrammable non-volatile memory using a breakdown phenomenon in an ultra-thin dielectric U.S. Patent No. 6,700,151
9 Reprogrammable non-volatile memory using a breakdown phenomenon in an ultra-thin dielectric

U.S. Patent No. 6,956,258

10 Reprogrammable non-volatile memory using a breakdown phenomenon in an ultra-thin dielectric TW Patent No. 201454
11 High density semiconductor memory cell and memory array using a
single transistor		 U.S. Patent No. 6,777,757
12 High density semiconductor memory cell and memory array using a
single transistor

TW Patent No. I 261918
13 High density semiconductor memory cell and memory array using a
single transistor

U.S. Patent No. 6,856,540
14 High density semiconductor memory cell and memory array using a
single transistor

U.S. Patent No. 6,898,116
15 Programming methods and circuits for semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric U.S. Patent No. 6,671,040
16 Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage U.S. Patent No. 6,791,891
17 Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage

Taiwan Patent No. 234162
18 Methods and circuits for testing programmability of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric US Patent No. 7,031,209
19 Methods and circuits for programming of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric US Patent No. 7,042,772
20 High density semiconductor memory cell and memory array using a single transistor and having variable gate oxide breakdown U.S. Patent No. 6,940,751
21 High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline U.S. Patent No. 6,992,925
22 3.5 transistor non-volatile memory cell using gate breakdown phenomena

US Patent No.: 7,173,851
23 Memory transistor gate oxide stress release and improved reliability US Patent No.: 7,269,047