Kilopass White Papers
- Integrating High Density Antifuse OTP NVM for Code Storage
For code storage, the most common NVM technologies used today are ROM and external flash/EEPROM solutions; however, in the 90nm and below, antifuse one-time programmable (OTP) technology is starting to gain in popularity. Antifuse has unique advantages of using a standard CMOS process, being highly secure, field programmable, and having indefinite data retention. These traits drive down overall cost of the SOC product. As the process technology scales, it will favor antifuse since the OTP die area will scale, resulting in shorter programming time. [download paper]
- A Comparison of Embedded Non-Volatile Memory Technologies and Their Applications
There are five embedded NVM technologies in the market: embedded Flash, ROM, eFuse, CMOS floating gate, and Antifuse. One benefit of the wide offering of technologies is that SOC designers and managers can choose the best solution for their end application. When choosing between the different technologies, an SOC designer or manager needs to consider the usage for the applications and the tradeoffs between each embedded NVM solution. Each has its advantages and disadvantages. [download paper]
- Eliminating Embedded Non-Volatile Memory IP Risks in SOCs (PDF)
With many embedded logic NVM options available, chip developers, foundry IP managers, and reliability managers need to narrow down the list of vendors by evaluating the risk of integrating an NVM IP. In this paper you will learn what to look for to ensure that the NVM IP will not cause headaches when your product goes into volume production. [download paper]
- Three Application Segments Require On-Chip OTP (PDF)
The use of high density one-time programmable (OTP) memory is now gaining considerable interest within the chip design community. The main reason for this renewed interest in OTP is the ability to tightly integrate high density permanent memory with digital logic in vanilla CMOS. The opportunity to tightly integrate OTP with SoC architectures sparks the system architect or designer's imagination in three strong value-added application segments. They are: Security, SoC Configurability, and Manufacturability-Usability.
[download paper]
- Profitable SoC Design: Using Logic NVM to Reduce SoC Costs
Current trends in the semiconductor industry emphasize the inherent business and engineering risks associated with the development and production of a new chip. With very low incremental costs for implementing personalization design elements into system architectures,designers and technology leaders are now realizing tremendous value.[download paper]
- Firmware Storage for Signal Processing (PDF)
This paper will review the problems with existing NVM solutions and describe a lowcost, reliable and secure OTP NVM technology for boot-up and program code storage for signal-processing applications. The technology also supports in-the-field modification of code and DSP coefficients--of critical importance to many DSP-based systems. [download paper]
- CMOS Logic NVM Enables Firmware Config (PDF)
Chip and system designers have traditionally been faced with large tradeoffs for choosing a firmware storage solution from traditionally available non-volatile technology options. Simply stated, the newly available Kilopass XPM technology is the only standard CMOS-NVM solution that meets the requirements of firmware storage without the drawbacks of mask-based (ROM) technologies and without the drawbacks of a nonstandard CMOS process. [download paper]
- Time-to-Market Applications (PDF)
In The McKinsey Quarterly, 2005 Number 2 survey of over 9000 global business executives, 81% said that Faster pace of technological innovation will be very important to global business over the next 5 years - and 71% indicated this trend would positively impact profitability. The well-known McKinsey study found that a six-month delay costs one third of the product's profits over its lifetime! [download paper]
- Hardware Security Requirements for Key Storage (PDF)
A new embedded permanent memory technology based on a standard logic CMOS antifuse provides unprecedented physical layer security for applications such as HDCP (High bandwidth Digital Content Protection) and AACS (Advanced Access Content System), both of which require unique encryption keys for each hardware device. The CMOS logic antifuse when combined with a robust key distribution, tracking, and management system tailored for the global semiconductor manufacturing supply chain provides end-to-end security for sensitive encryption keys from the licensor through to the end product.
[download paper]
- Methods for Configurable Hardware Design (PDF)
While adding post silicon production configurability has ample precedence with the introduction of FPGA devices in the late 1980's, it is a more recent trend with SoC ASSP and ASIC architectures. As logic gates continue to get cheaper, the corresponding benefits of making devices configurable with the advantages of time-to-market, reduced project schedule risk, and inventory risk in post production are too important to ignore. Indeed, similar benefits are demonstrated by the enormous success of programmable controllers, processors, and DSPs in most if not all SoC architectures as compared with hardwired function specific logic blocks that are considerably less general purpose in nature. A strengthening of this trend toward enhanced configurability is also seen with increased availability of Platform SoC Architectures.
[download paper]
